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| [[APL\360]]                                        || Ambiguous || {{No}}  ||colspan=2 {{No}}    || {{Maybe|Single}}    || {{Yes}} ||
| [[APL\360]]                                        || Ambiguous || {{No}}  ||colspan=2 {{No}}    || {{Maybe|Single}}    || {{Yes}} ||
|-
|-
| [[SHARP APL]]                                      || Operator  || {{Yes}} ||colspan=2 {{No}}    || {{No|Scalar}}      || {{Yes}} ||
| [[SHARP APL]]                                      || Operator  || {{Yes}} ||colspan=2 {{No}}    || {{Maybe|Scalar}}      || {{Yes}} ||
|-
|-
| [[NARS]], [[NARS2000]]                              || Function  || {{Yes}} || {{Yes}} || {{No}}  || {{Maybe|Single}}    || {{Yes}} ||
| [[NARS]], [[NARS2000]]                              || Function  || {{Yes}} || {{Yes}} || {{No}}  || {{Maybe|Single}}    || {{Yes}} ||
|-
|-
| [[Dyalog APL]]                                      || Function  || {{Yes}} || {{Yes}} || {{No}}  || {{Yes|APL2 (13.1)}} || {{Yes}} ||
| [[Dyalog APL]]                                      || Function  || {{Yes}} || {{Yes}} || {{No}}  || {{Yes|APL2}} ([[Dyalog APL versions#13.1|13.1]]) || {{Yes}} ||
|-
|-
| [[APL2]]                                            || Operator  || {{Yes}} || {{No}}  || {{Yes}} || {{Yes|APL2}}        || {{Yes}} ||
| [[APL2]]                                            || Operator  || {{Yes}} || {{No}}  || {{Yes}} || {{Yes|APL2}}        || {{Yes}} ||
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| [[A+]] (<source lang=apl inline>/</source>)        || Function  || {{Yes}} ||colspan=2 {{No}}    || {{Maybe|Single}}    || {{No}}  ||
| [[A+]] (<source lang=apl inline>/</source>)        || Function  || {{Yes}} ||colspan=2 {{No}}    || {{Maybe|Single}}    || {{No}}  ||
|-
|-
| [[J]] (<source lang=j inline>#</source>)            || Function  || {{Yes}} ||colspan=2 {{No}}    || {{No|Scalar}}      || {{No}}  || Complex left argument allowed
| [[J]] (<source lang=j inline>#</source>)            || Function  || {{Yes}} ||colspan=2 {{No}}    || {{Maybe|Scalar}}      || {{No}}  || Complex left argument allowed
|-
|-
| [[ISO/IEC 13751:2001]]                              || Function  || {{Yes}} ||colspan=2 {{No}}    || {{No|Scalar}}      || {{Yes}} ||
| [[ISO/IEC 13751:2001]]                              || Function  || {{Yes}} ||colspan=2 {{No}}    || {{Maybe|Scalar}}      || {{Yes}} ||
|-
|-
| [[APLX]]                                            || Operator  || {{Yes}} || {{Yes}} || {{Yes}} || {{Yes|APL2}}        || {{Yes}} ||
| [[APLX]]                                            || Operator  || {{Yes}} || {{Yes}} || {{Yes}} || {{Yes|APL2}}        || {{Yes}} ||
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| [[GNU APL]]                                        || Function  || {{Yes}} || {{No}}  || {{Yes}} || {{Yes|APL2}}        || {{Yes}} ||
| [[GNU APL]]                                        || Function  || {{Yes}} || {{No}}  || {{Yes}} || {{Yes|APL2}}        || {{Yes}} ||
|-
|-
| [[dzaima/APL]] (<source lang=apl inline>⌿</source>) || Function  || {{Yes}} || {{Yes}} || {{No}}  || {{None}}            || {{No}}  ||
| [[dzaima/APL]] (<source lang=apl inline>⌿</source>) || Function  || {{Yes}} || {{Yes}} || {{No}}  || {{No}}            || {{No}}  ||
|}
|}


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While filter is similar to Compress, some extensions to the [[wikipedia:x86|x86]] instruction set are exactly equivalent to Compress on particular data types. In [[wikipedia:BMI2|BMI2]], the PEXT and PDEP instructions (parallel bit extract and deposit) are identical to Compress and [[Expand]] on the bits of a register argument. Indeed, [[Dyalog APL]] uses these instructions to implement those primitives (see [[Dyalog APL#Instruction set usage]]). The [[wikipedia:AVX-512|AVX-512]] instructions VPCOMPRESSQ and VPEXPANDQ (and variations) are not only equivalent to Compress and Expand using a mask register for the [[Boolean]] argument and a vector register for the other argument, but are named after the APL functions. These instructions allow compression of 4-byte and 8-byte elements, and with AVX-512_VBMI2 support was added for 1-byte and 2-byte elements as well.
While filter is similar to Compress, some extensions to the [[wikipedia:x86|x86]] instruction set are exactly equivalent to Compress on particular data types. In [[wikipedia:BMI2|BMI2]], the PEXT and PDEP instructions (parallel bit extract and deposit) are identical to Compress and [[Expand]] on the bits of a register argument. Indeed, [[Dyalog APL]] uses these instructions to implement those primitives (see [[Dyalog APL#Instruction set usage]]). The [[wikipedia:AVX-512|AVX-512]] instructions VPCOMPRESSQ and VPEXPANDQ (and variations) are not only equivalent to Compress and Expand using a mask register for the [[Boolean]] argument and a vector register for the other argument, but are named after the APL functions. These instructions allow compression of 4-byte and 8-byte elements, and with AVX-512_VBMI2 support was added for 1-byte and 2-byte elements as well.
== See also ==
* [[Reshape]]


== External Links ==
== External Links ==
Retrieved from ‘https://aplwiki.com/wiki/Special:MobileDiff/4770...5080’

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