Performance: Difference between revisions

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129 bytes added ,  12:17, 7 July 2022
→‎Performant implementation: Move APL hardware to the end (with other more radical and less popular ideas) and add more context
(→‎Performant implementation: Move APL hardware to the end (with other more radical and less popular ideas) and add more context)
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{{Main|Magic function}}
{{Main|Magic function}}
The technique of implementing APL primitives using other primitives, or even simpler cases of the same primitive, can be advantageous for performance in addition to being easier for the implementer.<ref>[[Roger Hui]]. [http://www.dyalog.com/blog/2015/06/in-praise-of-magic-functions-part-one/ "In Praise of Magic Functions: Part I"]. [[Dyalog Ltd.|Dyalog]] blog. 2015-06-22.</ref> Even when a primitive does not use APL directly, reasoning in APL can lead to faster implementation techniques.<ref>[[Marshall Lochbaum]]. [https://www.dyalog.com/blog/2018/06/expanding-bits-in-shrinking-time/ "Expanding Bits in Shrinking Time"]. [[Dyalog Ltd.|Dyalog]] blog. 2018-06-11.</ref>
The technique of implementing APL primitives using other primitives, or even simpler cases of the same primitive, can be advantageous for performance in addition to being easier for the implementer.<ref>[[Roger Hui]]. [http://www.dyalog.com/blog/2015/06/in-praise-of-magic-functions-part-one/ "In Praise of Magic Functions: Part I"]. [[Dyalog Ltd.|Dyalog]] blog. 2015-06-22.</ref> Even when a primitive does not use APL directly, reasoning in APL can lead to faster implementation techniques.<ref>[[Marshall Lochbaum]]. [https://www.dyalog.com/blog/2018/06/expanding-bits-in-shrinking-time/ "Expanding Bits in Shrinking Time"]. [[Dyalog Ltd.|Dyalog]] blog. 2018-06-11.</ref>
=== APL hardware ===
{{Main|APL hardware}}
APL hardware is hardware that has been designed to natively support APL array operations. This breaks the popular understanding of APL as an interpreted language. Unlike x86, which is targeted to operate on individual scalars one at a time, native APL architectures would be targeted to operate on entire arrays at a time, thereby increasing the speed of APL processing.


=== Alternate array representations ===
=== Alternate array representations ===
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=== Ahead-of-time compilation ===
=== Ahead-of-time compilation ===
* [https://snakeisland.com/ Snake Island Research]
* [https://snakeisland.com/ Snake Island Research]
=== APL hardware ===
{{Main|APL hardware}}
APL hardware is hardware that has been designed to natively support APL array operations, and was a topic of some interest in the 1970s and 80s. APL hardware in this sense has not been developed. However, [[wikipedia:SIMD|SIMD]] and [[wikipedia:vector processor|vector processor]]s can be used for similar purposes and in some cases are directly inspired by APL. SIMD instructions are now widely available on consumer hardware, having been introduced to Intel's processors beginning in the late 90s.


== Performant usage ==
== Performant usage ==

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