Boolean: Difference between revisions

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→‎Boolean optimization: Clarify that SIMD ISAs are less convenient for boolean algorithms
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* Dyalog Blog: [[Marshall Lochbaum]], [https://www.dyalog.com/blog/2018/06/expanding-bits-in-shrinking-time/ "Expanding Bits in Shrinking Time"]
* Dyalog Blog: [[Marshall Lochbaum]], [https://www.dyalog.com/blog/2018/06/expanding-bits-in-shrinking-time/ "Expanding Bits in Shrinking Time"]


Because they are so small relative to CPU registers, Booleans can make [[wikipedia:SIMD|SIMD]] (Single Instruction Multiple Data) techniques viable even in processors with no dedicated SIMD unit. Programming in this way is called [[wikipedia:SWAR|SWAR]] (SIMD Within a Register), and is considerably easier when working with bit Booleans than when working with integers. Most processors now have SIMD registers and instructions, and the highest levels of Boolean optimization usually require using these instructions. However, Boolean SWAR programming can still be useful to develop algorithms which are fast (often beating dedicated SIMD optimizations on byte-sized data) while remaining architecture independent.
Because they are so small relative to CPU registers, Booleans can make [[wikipedia:SIMD|SIMD]] (Single Instruction Multiple Data) techniques viable even in processors with no dedicated SIMD unit. Programming in this way is called [[wikipedia:SWAR|SWAR]] (SIMD Within a Register), and is considerably easier when working with bit Booleans than when working with integers. While most processors now have SIMD registers and instructions, current SIMD implementations don't provide all the bitwise operations that are available for ordinary registers, such as addition or bitwise shifts on entire registers. Boolean SWAR programming can be useful to more easily develop algorithms which are fast (often beating dedicated SIMD optimizations with each Boolean stored in a byte) while remaining architecture independent.


== External links ==
== External links ==

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