APL hardware
APL Hardware is hardware that has been designed to natively support APL array operations. This breaks the popular understanding of APL as an interpreted language. Unlike x86, which is targeted to operate on individual scalars one at a time, native APL architectures would be targeted to operate on entire arrays at a time, thereby increasing the speed of APL processing.
Cellular APL Computer
Overview
System Design of a Cellular APL Computer, written in April 1970 by Kenneth J. Thurber and John W. Myrna, is a paper describing a possible design for a computer which implements a dialect of APL as its machine language. The purpose of the design was to take advantage of the inherent parallelism in APL by being flexible enough to operate on entire arrays. The design was built to be cellular, meaning that each component would handle a separate part of the APL logic.
Design
The specified design contains:
- a matrix logic-in-memory unit (MLIM)
- sixteen memory arrays (MA1, MA2..., MA16)
- an instruction memory unit (IMU)
- routing logic (RL)
- thirty-two vector accumulators (VA1, VA2..., VA32)
- input-output controllers (IOC)
- a preprocessor (PP)